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Publications

Book Chapters

  • F. Leduc-Primeau, S. Hemati, V. C. Gaudet and W. J. Gross. “Stochastic Decoding of Error-Correcting Codes,” Chapter in Stochastic Computing: Techniques and Applications, W. Gross and V. Gaudet eds., Springer, 2019.
  • F. Leduc-Primeau, V. C. Gaudet and W. J. Gross. “Stochastic Decoders for LDPC Codes,” Chapter in Advanced Hardware Design for Error Correcting Codes, C. Chavet and P. Coussy eds., Springer, 2015. (Link 1)

Journal

  • C. Condo, P. Giard, F. Leduc-Primeau, G. Sarkis and W. J. Gross. “A 9.52 dB NCG FEC Scheme and 162 b/Cycle Low-Complexity Product Decoder Architecture,” IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 65, no. 4, pp. 1420-1431, Apr. 2018. (IEEEXplore)
  • F. Leduc-Primeau, F. R. Kschischang and W. J. Gross. “Modeling and Energy Optimization of LDPC Decoder Circuits with Timing Violations,” IEEE Transactions on Communications, vol. 66, no. 3, pp. 932-946, Mar. 2018. (IEEEXplore) (arXiv)
  • A. Ardakani, F. Leduc-Primeau, N. Onizawa, T. Hanyu and W. J. Gross. “VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 10, pp. 2688-2699, Oct. 2017. (IEEEXplore)
  • K. Boga, F. Leduc-Primeau, N. Onizawa, K. Matsumiya, T. Hanyu and W. J. Gross. “A Generalized Stochastic Implementation of the Disparity Energy Model for Depth Perception,” Journal of Signal Processing Systems, Dec. 2016. (Link 1) (Link 2)
  • S. Hemati, F. Leduc-Primeau and W. J. Gross. “A Relaxed Min-Sum LDPC Decoder With Simplified Check Nodes,” IEEE Communications Letters, vol. 20, no. 3, pp. 422-425, Mar. 2016. (IEEEXplore)
  • F. Leduc-Primeau, V. Gripon, M. G. Rabbat and W. J. Gross. “Fault-Tolerant Associative Memories Based on c-Partite Graphs,” IEEE Trans. on Signal Processing, vol. 64, no. 4, pp. 829-841, Feb. 2016. (IEEEXplore)
  • F. Leduc-Primeau, S. Hemati, S. Mannor and W. J. Gross. “Relaxed Half-Stochastic Belief Propagation,” IEEE Trans. on Communications, vol. 61, no. 5, pp. 1648-1659, May 2013. (IEEEXplore) (Link 2)
  • F. Leduc-Primeau, S. Hemati, S. Mannor and W. J. Gross. “Dithered Belief Propagation Decoding,” IEEE Trans. on Communications, vol. 60, no. 8, pp. 2042-2047, Aug. 2012. (IEEEXplore) (Link 2)

Conference

  • G. B. Hacene, F. Leduc-Primeau, A. B. Soussia, V. Gripon and F. Gagnon. “Training Modern Deep Neural Networks for Memory-Fault Robustness,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2019, to appear. (Link 1)
  • E. Dupraz, F. Leduc-Primeau and F. Gagnon. “Low-Latency LDPC Decoding Achieved by Code and Architecture Co-Design,” in 10th Int. Symp. on Turbo Codes and Iterative Information Processing, Dec. 2018. (Link 1) (IEEEXplore)
  • J. Nadal, F. Leduc-Primeau, C. Abdel Nour and A. Baghdadi. “A Block FBMC Receiver Designed For Short Filters,” in Proc. 2018 IEEE Int. Conf. on Communications (ICC 2018), 2018. (IEEEXplore)
  • J. C. Vialatte and F. Leduc-Primeau. “A Study of Deep Learning Robustness Against Computation Failures,” in Proc. 9th Int. Conf. on Advanced Cognitive Technologies and Applications, Feb. 2017. (arXiv)
  • A. Ardakani, F. Leduc-Primeau, N. Onizawa, T. Hanyu and W. J. Gross. “VLSI implementation of deep neural networks using integral stochastic computing,” in 9th Int. Symp. on Turbo Codes and Iterative Information Processing (ISTC), Sep. 2016. (IEEEXplore)
  • A. Ardakani, F. Leduc-Primeau and W. J. Gross. “Hardware implementation of FIR/IIR digital filters using integral stochastic computation,” in 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Mar. 2016. (IEEEXplore)
  • F. Leduc-Primeau and W. J. Gross. “Finite-Length Quasi-Synchronous LDPC Decoders,” in 9th Int. Symp. on Turbo Codes and Iterative Information Processing, Sep. 2016. (IEEEXplore)
  • C. Condo, F. Leduc-Primeau, G. Sarkis, P. Giard and W. J. Gross. “Stall pattern avoidance in polynomial product codes,” in 2016 IEEE Global Conference on Signal and Information Processing (GlobalSIP), Dec. 2016. (IEEEXplore)
  • K. Boga, N. Onizawa, F. Leduc-Primeau, K. Matsumiya, T. Hanyu and W. J. Gross. “Stochastic implementation of the disparity energy model for depth perception,” in 2015 IEEE Workshop on Signal Processing Systems (SiPS), Oct. 2015. (IEEEXplore)
  • F. Leduc-Primeau, F. R. Kschischang and W. J. Gross. “Energy optimization of LDPC decoder circuits with timing violations,” in 2015 IEEE Int. Conf. on Communications (ICC), Jun. 2015. (IEEEXplore)
  • F. Leduc-Primeau, V. Gripon, M. G. Rabbat and W. J. Gross. “Cluster-based associative memories built from unreliable storage,” in 2014 IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2014. (IEEEXplore)
  • F. Leduc-Primeau and W. J. Gross. “Faulty Gallager-B Decoding with Optimal Message Repetition,” in Proc. 50th Allerton Conf. on Communication, Control, and Computing, Oct. 2012. (IEEEXplore) (Link 2)
  • F. Leduc-Primeau, A. J. Raymond, P. Giard, K. Cushon, C. Thibeault and W. J. Gross. “High-Throughput LDPC Decoding Using The RHS Algorithm,” in Proc. 2012 Conf. on Design & Arch. for Signal & Image Processing (DASIP), Oct. 2012. (IEEEXplore) (Link 2)
  • F. Leduc-Primeau, S. Hemati, S. Mannor and W. J. Gross. “Lowering Error Floors Using Dithered Belief Propagation,” in 2010 IEEE Global Telecommunications Conference (GLOBECOM), Dec. 2010. (IEEEXplore)
  • F. Leduc-Primeau, S. Hemati, W. J. Gross and S. Mannor. “A Relaxed Half-Stochastic Iterative Decoder for LDPC Codes,” in 2009 IEEE Global Telecommunications Conference (GLOBECOM), Dec. 2009. (IEEEXplore)
en/publications.txt · Last modified: 2019/02/24 22:56 by francoislp